阅读手册后发现其实Bootlets这东西,也不是那么难,自己写了一个,非常方便,启动速度大大提升.不作解释,存档用.反正1ms内完成Boot就是了.
int _start(int arg)
{
unsigned int value;
char *pMemlocation = (char *)EMI_MAX_MEM_BK;
volatile unsigned int *DRAM_REG = (volatile unsigned int *) HW_DRAM_CTL00_ADDR;
HW_RTC_CTRL_CLR( BM_RTC_CTRL_SFTRST );
while( HW_RTC_CTRL.B.SFTRST == 1 );
HW_RTC_CTRL_CLR( BM_RTC_CTRL_CLKGATE );
while( HW_RTC_CTRL.B.CLKGATE == 1 );
BF_SET(POWER_5VCTRL, PWRUP_VBUS_CMPS);
BF_WR(POWER_5VCTRL, VBUSVALID_TRSH, VBUS_VALID_THRESH_4400);
BF_SET(POWER_LOOPCTRL, TOGGLE_DIF);
BF_SET(POWER_LOOPCTRL, EN_CM_HYST);
BF_SET(POWER_LOOPCTRL, EN_DF_HYST);
BF_SET(POWER_LOOPCTRL, RCSCALE_THRESH);
BF_WR(POWER_LOOPCTRL, EN_RCSCALE, HW_POWER_RCSCALE_8X_INCR);
BF_CLR(POWER_MINPWR, HALF_FETS);
BF_SET(POWER_MINPWR, DOUBLE_FETS);
HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_DCDC_XFER);
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 30));
HW_POWER_5VCTRL_CLR(BM_POWER_5VCTRL_DCDC_XFER);
HW_RTC_PERSISTENT1_SET(0x800);
BF_SET(POWER_BATTMONITOR, EN_BATADJ);
BF_CLR(LRADC_CONVERSION, AUTOMATIC);
BF_WR(POWER_BATTMONITOR, BATT_VAL, 525);
HW_POWER_BATTMONITOR.B.BRWNOUT_LVL = BATTERY_BRWNOUT_BITFIELD_VALUE;
if( HW_POWER_STS.B.VDD5V_GT_VDDIO )
{
HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_VBUSVALID_5VDETECT);
HW_POWER_CTRL_CLR(BM_POWER_CTRL_POLARITY_VBUSVALID | BM_POWER_CTRL_POLARITY_VDD5V_GT_VDDIO );
HW_POWER_CTRL_CLR(BM_POWER_CTRL_VBUSVALID_IRQ | BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ );
{
uint32_t vdddctrl, vddactrl, vddioctrl, i;
vdddctrl = HW_POWER_VDDDCTRL_RD();
vddactrl = HW_POWER_VDDACTRL_RD();
vddioctrl = HW_POWER_VDDIOCTRL_RD();
HW_POWER_VDDDCTRL_SET(BM_POWER_VDDDCTRL_DISABLE_FET | BM_POWER_VDDDCTRL_ENABLE_LINREG | BM_POWER_VDDDCTRL_PWDN_BRNOUT);
HW_POWER_VDDACTRL_SET(BM_POWER_VDDACTRL_DISABLE_FET | BM_POWER_VDDACTRL_ENABLE_LINREG | BM_POWER_VDDACTRL_PWDN_BRNOUT);
HW_POWER_VDDIOCTRL_SET(BM_POWER_VDDIOCTRL_DISABLE_FET | BM_POWER_VDDIOCTRL_PWDN_BRNOUT);
HW_POWER_DCDC4P2.B.CMPTRIP = 31;
HW_POWER_DCDC4P2.B.TRG = 0;
HW_POWER_5VCTRL.B.HEADROOM_ADJ = 0x4;
HW_POWER_DCDC4P2.B.DROPOUT_CTRL = 0x8;
HW_POWER_5VCTRL.B.CHARGE_4P2_ILIMIT = 0x3f;
BF_SET(POWER_DCDC4P2, ENABLE_4P2);
BF_SET(POWER_CHARGE, ENABLE_LOAD);
HW_POWER_5VCTRL.B.CHARGE_4P2_ILIMIT = 0;
HW_POWER_DCDC4P2.B.TRG = 0;
BF_CLR(POWER_5VCTRL, PWD_CHARGE_4P2);
{
bool orig_vbusvalid_5vdetect = false;
bool orig_pwd_bo = false;
uint8_t orig_vbusvalid_threshold;
bool bPrev5vBoPwrdn;
bool bPrev5vDroop;
BF_CLR(POWER_5VCTRL, PWDN_5VBRNOUT);
HW_POWER_RESET_WR((POWERDOWN_KEY << 16) | BM_POWER_RESET_PWD_OFF);
bPrev5vBoPwrdn = HW_POWER_5VCTRL.B.PWDN_5VBRNOUT;
bPrev5vDroop = BF_RD(POWER_CTRL, ENIRQ_VDD5V_DROOP);
BF_CLR(POWER_CTRL, ENIRQ_VDD5V_DROOP);
orig_vbusvalid_threshold (HW_POWER_5VCTRL_RD() & BM_POWER_5VCTRL_VBUSVALID_TRSH) >> BP_POWER_5VCTRL_VBUSVALID_TRSH;
if(HW_POWER_5VCTRL_RD() & BM_POWER_5VCTRL_VBUSVALID_5VDETECT)
orig_vbusvalid_5vdetect = true;
if(HW_POWER_MINPWR_RD() & BM_POWER_MINPWR_PWD_BO)
orig_pwd_bo = true;
HW_POWER_5VCTRL_CLR(BM_POWER_5VCTRL_VBUSVALID_5VDETECT);
HW_POWER_5VCTRL_CLR(BF_POWER_5VCTRL_VBUSVALID_TRSH(0x7));
HW_POWER_5VCTRL_SET(BM_POWER_MINPWR_PWD_BO);
HW_POWER_CTRL_CLR(BM_POWER_CTRL_VBUSVALID_IRQ);
BF_SET(POWER_DCDC4P2, ENABLE_DCDC);
i = HW_POWER_5VCTRL.B.CHARGE_4P2_ILIMIT;
while(i < 63)
{
i++;
HW_POWER_5VCTRL.B.CHARGE_4P2_ILIMIT = i;
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 100));
}
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 100000));
HW_POWER_CTRL_CLR(BM_POWER_CTRL_DCDC4P2_BO_IRQ);
HW_POWER_DCDC4P2.B.BO = 0;
HW_POWER_CTRL_CLR(BM_POWER_CTRL_DCDC4P2_BO_IRQ);
HW_POWER_CTRL_SET(BM_POWER_CTRL_ENIRQ_DCDC4P2_BO);
HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_DCDC_XFER);
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 20));
HW_POWER_5VCTRL_CLR(BM_POWER_5VCTRL_DCDC_XFER);
HW_POWER_CTRL_CLR(BM_POWER_CTRL_VBUSVALID_IRQ);
BF_SET(POWER_5VCTRL, ENABLE_DCDC);
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 21));
HW_POWER_5VCTRL_SET(BF_POWER_5VCTRL_VBUSVALID_TRSH( orig_vbusvalid_threshold));
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 10));
if(HW_POWER_CTRL_RD() & BM_POWER_CTRL_VBUSVALID_IRQ)
{
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 1000));
HW_POWER_CTRL_CLR(BM_POWER_CTRL_VBUSVALID_IRQ);
HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_PWD_CHARGE_4P2);
HW_POWER_5VCTRL_CLR(BM_POWER_5VCTRL_PWD_CHARGE_4P2);
}
if(orig_vbusvalid_5vdetect) HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_VBUSVALID_5VDETECT);
if(!orig_pwd_bo) HW_POWER_5VCTRL_CLR(BM_POWER_MINPWR_PWD_BO);
while( BF_RD(POWER_CTRL, VBUSVALID_IRQ) != 0 ) BF_CLR(POWER_CTRL, VBUSVALID_IRQ);
if( bPrev5vBoPwrdn )
BF_SET(POWER_5VCTRL, PWDN_5VBRNOUT);
else
BF_CLR(POWER_5VCTRL, PWDN_5VBRNOUT);
HW_POWER_RESET_WR(POWERDOWN_KEY << 16);
while( BF_RD(POWER_CTRL, VDD5V_DROOP_IRQ) != 0 ) BF_CLR(POWER_CTRL, VDD5V_DROOP_IRQ);
if(bPrev5vDroop)
{
BF_SET(POWER_CTRL, ENIRQ_VDD5V_DROOP);
}
else
{
BF_CLR(POWER_CTRL, ENIRQ_VDD5V_DROOP);
}
}
HW_POWER_VDDDCTRL_WR(vdddctrl);
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 20));
HW_POWER_VDDACTRL_WR(vddactrl);
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 20));
HW_POWER_VDDIOCTRL_WR(vddioctrl);
if( (HW_POWER_VDDDCTRL.B.DISABLE_FET == 0) || (HW_POWER_VDDACTRL.B.DISABLE_FET == 0) || (HW_POWER_VDDIOCTRL.B.DISABLE_FET == 0))
BF_CLR(POWER_CHARGE, ENABLE_LOAD);
}
}
else
{
HW_POWER_VDDIOCTRL.B.BO_OFFSET = BO_OFFSET_MAX;
while(HW_POWER_STS.B.PSWITCH <= 0);
HW_POWER_5VCTRL_CLR(BM_POWER_5VCTRL_PWDN_5VBRNOUT);
HW_POWER_5VCTRL_CLR(BM_POWER_5VCTRL_ENABLE_DCDC);
BF_CLR(POWER_DCDC4P2, ENABLE_DCDC);
BF_CLR(POWER_DCDC4P2, ENABLE_4P2);
BF_CLR(POWER_CHARGE, ENABLE_LOAD);
BF_SET(POWER_5VCTRL, DCDC_XFER);
value = HW_DIGCTL_MICROSECONDS_RD();
while(HW_DIGCTL_MICROSECONDS_RD() < (value + 1000));
BF_CLR(POWER_5VCTRL, DCDC_XFER);
BF_CLR(POWER_CTRL, ENIRQ_DCDC4P2_BO);
HW_POWER_MINPWR_CLR(BM_POWER_MINPWR_HALF_FETS);
HW_POWER_MINPWR_SET(BM_POWER_MINPWR_DOUBLE_FETS);
HW_POWER_VDDDCTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
HW_POWER_VDDACTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
HW_POWER_VDDIOCTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
HW_POWER_VDDDCTRL.B.DISABLE_FET = 0;
HW_POWER_VDDIOCTRL.B.DISABLE_FET = 0;
HW_POWER_VDDACTRL.B.DISABLE_FET = 0;
HW_POWER_VDDDCTRL.B.ENABLE_LINREG = 0;
HW_POWER_VDDACTRL.B.ENABLE_LINREG = 0;
HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_PWD_CHARGE_4P2);
HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_ENABLE_DCDC);
BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT, 0x8);
}
HW_CLKCTRL_PLL0CTRL0_SET(BM_CLKCTRL_PLL0CTRL0_POWER);
HW_CLKCTRL_CLKSEQ_CLR(BM_CLKCTRL_CLKSEQ_BYPASS_CPU);
HW_POWER_VDDDCTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
HW_POWER_VDDDCTRL.B.DISABLE_FET = 0;
HW_POWER_VDDDCTRL.B.ENABLE_LINREG = 0;
HW_POWER_VDDDCTRL.B.DISABLE_STEPPING = 0;
HW_POWER_CTRL_CLR(BM_POWER_CTRL_VDDD_BO_IRQ | BM_POWER_CTRL_VDDA_BO_IRQ | BM_POWER_CTRL_VDDIO_BO_IRQ);
HW_POWER_VDDDCTRL.B.PWDN_BRNOUT = 1;
HW_POWER_VDDACTRL.B.PWDN_BRNOUT = 1;
HW_POWER_VDDIOCTRL.B.PWDN_BRNOUT = 1;
HW_POWER_CTRL_CLR(BM_POWER_CTRL_VDDD_BO_IRQ | BM_POWER_CTRL_VDDA_BO_IRQ | BM_POWER_CTRL_VDDIO_BO_IRQ | BM_POWER_CTRL_VDD5V_DROOP_IRQ | BM_POWER_CTRL_VBUSVALID_IRQ | BM_POWER_CTRL_BATT_BO_IRQ | BM_POWER_CTRL_DCDC4P2_BO_IRQ);
HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_PWDN_5VBRNOUT);
HW_POWER_REFCTRL_SET(1 << 7);
HW_PINCTRL_MUXSEL6_CLR(0xF0);
HW_PINCTRL_MUXSEL6_SET(0xA0);
HW_PINCTRL_MUXSEL7_SET(0x30000);
HW_PINCTRL_EMI_DS_CTRL_SET(BW_PINCTRL_EMI_DS_CTRL_DDR_MODE(0x3));
HW_CLKCTRL_PLL0CTRL0_SET(BM_CLKCTRL_PLL0CTRL0_POWER);
HW_PINCTRL_DRIVE8_CLR(0x33333333);
HW_PINCTRL_DRIVE9_CLR(0x00000333);
HW_PINCTRL_DRIVE8_SET(0x22222222);
HW_PINCTRL_DRIVE9_SET(0x00000222);
HW_PINCTRL_MUXSEL10_CLR(0xFFFFFFFF);
HW_PINCTRL_MUXSEL11_CLR(0x0030FFFF);
HW_PINCTRL_MUXSEL12_CLR(0x3FFFFFFF);
HW_PINCTRL_MUXSEL13_CLR(0x0003FFFF);
HW_CLKCTRL_FRAC0_SET(BM_CLKCTRL_FRAC0_CLKGATEEMI);
HW_CLKCTRL_FRAC0_SET(BM_CLKCTRL_FRAC0_EMIFRAC);
HW_CLKCTRL_FRAC0_CLR(BF_CLKCTRL_FRAC0_EMIFRAC(0xFFFFFFEA));
HW_CLKCTRL_FRAC0_CLR(BM_CLKCTRL_FRAC0_CLKGATEEMI);
HW_CLKCTRL_EMI_WR(BF_CLKCTRL_EMI_DIV_XTAL(1) | BF_CLKCTRL_EMI_DIV_EMI(2));
HW_CLKCTRL_CLKSEQ_CLR(BM_CLKCTRL_CLKSEQ_BYPASS_EMI);
HW_POWER_VDDACTRL_WR(0x0008260C);
value = HW_DRAM_CTL16_RD();
value &= ~BM_DRAM_CTL16_START;
HW_DRAM_CTL16_WR(value);
DRAM_REG[0] = 0x00000000 ;
DRAM_REG[1] = 0x00000000 ;
DRAM_REG[2] = 0x00000000 ;
DRAM_REG[3] = 0x00000000 ;
DRAM_REG[4] = 0x00000000 ;
DRAM_REG[5] = 0x00000000 ;
DRAM_REG[6] = 0x00000000 ;
DRAM_REG[7] = 0x00000000 ;
DRAM_REG[8] = 0x00000000 ;
DRAM_REG[9] = 0x00000000 ;
DRAM_REG[10] = 0x00000000 ;
DRAM_REG[11] = 0x00000000 ;
DRAM_REG[12] = 0x00000000 ;
DRAM_REG[13] = 0x00000000 ;
DRAM_REG[14] = 0x00000000 ;
DRAM_REG[15] = 0x00000000 ;
DRAM_REG[16] = 0x00000000 ;
DRAM_REG[17] = 0x00000100 ;
DRAM_REG[18] = 0x00000000 ;
DRAM_REG[19] = 0x00000000 ;
DRAM_REG[20] = 0x00000000 ;
DRAM_REG[21] = 0x00000000 ;
DRAM_REG[22] = 0x00000000 ;
DRAM_REG[23] = 0x00000000 ;
DRAM_REG[24] = 0x00000000 ;
DRAM_REG[25] = 0x00000000 ;
DRAM_REG[26] = 0x00010101 ;
DRAM_REG[27] = 0x01010101 ;
DRAM_REG[28] = 0x000f0f01 ;
DRAM_REG[29] = 0x0f02020a ;
DRAM_REG[30] = 0x00000000 ;
DRAM_REG[31] = 0x00000101 ;
DRAM_REG[32] = 0x00000100 ;
DRAM_REG[33] = 0x00000100 ;
DRAM_REG[34] = 0x00000000 ;
DRAM_REG[35] = 0x00000002 ;
DRAM_REG[36] = 0x01010000 ;
DRAM_REG[37] = 0x07080403 ;
DRAM_REG[38] = 0x06005003 ;
DRAM_REG[39] = 0x0a0000c8 ;
DRAM_REG[40] = 0x02009c40 ;
DRAM_REG[41] = 0x0002030c ;
DRAM_REG[42] = 0x0036a609 ;
DRAM_REG[43] = 0x031a0612 ;
DRAM_REG[44] = 0x02030202 ;
DRAM_REG[45] = 0x00c8001c ;
DRAM_REG[46] = 0x00000000 ;
DRAM_REG[47] = 0x00000000 ;
DRAM_REG[48] = 0x00012100 ;
DRAM_REG[49] = 0xffff0303 ;
DRAM_REG[50] = 0x00012100 ;
DRAM_REG[51] = 0xffff0303 ;
DRAM_REG[52] = 0x00012100 ;
DRAM_REG[53] = 0xffff0303 ;
DRAM_REG[54] = 0x00012100 ;
DRAM_REG[55] = 0xffff0303 ;
DRAM_REG[56] = 0x00000003 ;
DRAM_REG[57] = 0x00000000 ;
DRAM_REG[58] = 0x00000000 ;
DRAM_REG[59] = 0x00000000 ;
DRAM_REG[60] = 0x00000000 ;
DRAM_REG[61] = 0x00000000 ;
DRAM_REG[62] = 0x00000000 ;
DRAM_REG[63] = 0x00000000 ;
DRAM_REG[64] = 0x00000000 ;
DRAM_REG[65] = 0x00000000 ;
DRAM_REG[66] = 0x00000612 ;
DRAM_REG[67] = 0x01000f02 ;
DRAM_REG[68] = 0x06120612 ;
DRAM_REG[69] = 0x00000200 ;
DRAM_REG[70] = 0x00020007 ;
DRAM_REG[71] = 0xf4004a27;
DRAM_REG[72] = 0xf4004a27;
DRAM_REG[73] = 0xf4004a27;
DRAM_REG[74] = 0xf4004a27;
DRAM_REG[75] = 0x07000300 ;
DRAM_REG[76] = 0x07000300 ;
DRAM_REG[77] = 0x07400300 ;
DRAM_REG[78] = 0x07400300 ;
DRAM_REG[79] = 0x00000005 ;
DRAM_REG[80] = 0x00000000 ;
DRAM_REG[81] = 0x00000000 ;
DRAM_REG[82] = 0x01000000 ;
DRAM_REG[83] = 0x01020408 ;
DRAM_REG[84] = 0x08040201 ;
DRAM_REG[85] = 0x000f1133 ;
DRAM_REG[86] = 0x00000000 ;
DRAM_REG[87] = 0x00001f04;
DRAM_REG[88] = 0x00001f04;
DRAM_REG[89] = 0x00001f04;
DRAM_REG[90] = 0x00001f04;
DRAM_REG[91] = 0x00001f04;
DRAM_REG[92] = 0x00001f04;
DRAM_REG[93] = 0x00001f04;
DRAM_REG[94] = 0x00001f04;
DRAM_REG[95] = 0x00000000 ;
DRAM_REG[96] = 0x00000000 ;
DRAM_REG[97] = 0x00000000 ;
DRAM_REG[98] = 0x00000000 ;
DRAM_REG[99] = 0x00000000 ;
DRAM_REG[100] = 0x00000000 ;
DRAM_REG[101] = 0x00000000 ;
DRAM_REG[102] = 0x00000000 ;
DRAM_REG[103] = 0x00000000 ;
DRAM_REG[104] = 0x00000000 ;
DRAM_REG[105] = 0x00000000 ;
DRAM_REG[106] = 0x00000000 ;
DRAM_REG[107] = 0x00000000 ;
DRAM_REG[108] = 0x00000000 ;
DRAM_REG[109] = 0x00000000 ;
DRAM_REG[110] = 0x00000000 ;
DRAM_REG[111] = 0x00000000 ;
DRAM_REG[112] = 0x00000000 ;
DRAM_REG[113] = 0x00000000 ;
DRAM_REG[114] = 0x00000000 ;
DRAM_REG[115] = 0x00000000 ;
DRAM_REG[116] = 0x00000000 ;
DRAM_REG[117] = 0x00000000 ;
DRAM_REG[118] = 0x00000000 ;
DRAM_REG[119] = 0x00000000 ;
DRAM_REG[120] = 0x00000000 ;
DRAM_REG[121] = 0x00000000 ;
DRAM_REG[122] = 0x00000000 ;
DRAM_REG[123] = 0x00000000 ;
DRAM_REG[124] = 0x00000000 ;
DRAM_REG[125] = 0x00000000 ;
DRAM_REG[126] = 0x00000000 ;
DRAM_REG[127] = 0x00000000 ;
DRAM_REG[128] = 0x00000000 ;
DRAM_REG[129] = 0x00000000 ;
DRAM_REG[130] = 0x00000000 ;
DRAM_REG[131] = 0x00000000 ;
DRAM_REG[132] = 0x00000000 ;
DRAM_REG[133] = 0x00000000 ;
DRAM_REG[134] = 0x00000000 ;
DRAM_REG[135] = 0x00000000 ;
DRAM_REG[136] = 0x00000000 ;
DRAM_REG[137] = 0x00000000 ;
DRAM_REG[138] = 0x00000000 ;
DRAM_REG[139] = 0x00000000 ;
DRAM_REG[140] = 0x00000000 ;
DRAM_REG[141] = 0x00000000 ;
DRAM_REG[142] = 0x00000000 ;
DRAM_REG[143] = 0x00000000 ;
DRAM_REG[144] = 0x00000000 ;
DRAM_REG[145] = 0x00000000 ;
DRAM_REG[146] = 0x00000000 ;
DRAM_REG[147] = 0x00000000 ;
DRAM_REG[148] = 0x00000000 ;
DRAM_REG[149] = 0x00000000 ;
DRAM_REG[150] = 0x00000000 ;
DRAM_REG[151] = 0x00000000 ;
DRAM_REG[152] = 0x00000000 ;
DRAM_REG[153] = 0x00000000 ;
DRAM_REG[154] = 0x00000000 ;
DRAM_REG[155] = 0x00000000 ;
DRAM_REG[156] = 0x00000000 ;
DRAM_REG[157] = 0x00000000 ;
DRAM_REG[158] = 0x00000000 ;
DRAM_REG[159] = 0x00000000 ;
DRAM_REG[160] = 0x00000000 ;
DRAM_REG[161] = 0x00000000 ;
DRAM_REG[162] = 0x00010000 ;
DRAM_REG[163] = 0x00030404 ;
DRAM_REG[164] = 0x00000003 ;
DRAM_REG[165] = 0x00000000 ;
DRAM_REG[166] = 0x00000000 ;
DRAM_REG[167] = 0x00000000 ;
DRAM_REG[168] = 0x00000000 ;
DRAM_REG[169] = 0x00000000 ;
DRAM_REG[170] = 0x00000000 ;
DRAM_REG[171] = 0x01010000 ;
DRAM_REG[172] = 0x01000000 ;
DRAM_REG[173] = 0x03030000 ;
DRAM_REG[174] = 0x00010303 ;
DRAM_REG[175] = 0x01020202 ;
DRAM_REG[176] = 0x00000000 ;
DRAM_REG[177] = 0x02040303 ;
DRAM_REG[178] = 0x21002103 ;
DRAM_REG[179] = 0x00061200 ;
DRAM_REG[180] = 0x06120612 ;
DRAM_REG[181] = 0x04420442 ;
DRAM_REG[182] = 0x04420442 ;
DRAM_REG[183] = 0x00040004 ;
DRAM_REG[184] = 0x00040004 ;
DRAM_REG[185] = 0x00000000 ;
DRAM_REG[186] = 0x00000000 ;
DRAM_REG[187] = 0x00000000 ;
DRAM_REG[188] = 0x00000000 ;
DRAM_REG[189] = 0xffffffff ;
value = HW_DRAM_CTL17_RD();
value &= ~BM_DRAM_CTL17_SREFRESH;
HW_DRAM_CTL17_WR(value);
value = HW_DRAM_CTL16_RD();
value |= BM_DRAM_CTL16_START;
HW_DRAM_CTL16_WR(value);
while(!(HW_DRAM_CTL58_RD() & 0x100000));
memcpy (pMemlocation, &ddr2_array, 6);
pMemlocation += 6;
*pMemlocation++ = 251;
*pMemlocation++ = 28;
pMemlocation = (char *)EMI_MAX_MEM_BK_ANOTHER;
memcpy (pMemlocation, &ddr2_array, 6);
pMemlocation += 6;
*pMemlocation++ = 241;
*pMemlocation++ = 156;
}